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1 KHz Synchronous Detector Circuit
This circuit employs a synchronous demodulator to separate a one KHz signal from noise and measures the amplitude in the one kHz signals as soon as a second at about sixty micro volts per count then sends the measurements via an RS-232 interface for additional processing or display. An LED about the board also lights when the measured signal exceeds a preset threshold.
This experiment was started when I took an interest in getting ELF wireless signals. Furthermore, it has applictions in optics and higher frequency RF, or for that issue, any place 1 wants to measure a small signal, of which the frequency and phase are known, within the presence of noise.
Together with the addition of the preamplifier based on the LM324, the sensitivity of this circuit was effortlessly extended to a sensitivity to 160 nanovolts per count. That an LM324 is used with little inside the means of noise about the output testifies to the worth of using this type of detector.
The incoming signal is buffered by U2A (there is on U1 with this schematic as U1 was moved to a separate preamp assembly), which delivers a noniverted signal to the integrator when U3A is switched on. U2B inverts the buffered signal from U2A and delivers an inverted edition with the signal to the integrator when U3B is switched on. To increase the charging charge, both lower the 100k resistor around the input of U2C or lower the .047 uf integrating capacitor. The signals fed to the integrator charge the .047 uf capacitor inside the integrator. Immediately after 999 cycles from the 1 kHz sampling signal, U3C is turned on and the capacitor is discharged having a continual current (one.8V/7.5K = 240 microamps), creating a linear positive-going ramp at five,106 volts/second on the output of U2C. Whilst the output of U2 is ramping up toward the one.eight volt reference, the AT90S2313 sits inside a loop, incrementing a counter each one.25 microseconds, until the comparitor about the AT90S2313 adjustments state, indicating the ramp on U2C has achieved the one.8 volt reference voltage. The optimum count for this measurement is 127 to restrict the time put in within the measurement to less than the 250 microsecond interrupt interval. Therefore, a seven bit measurement is created in 160 microseconds or much less, and is finished inside just one 250 microsecond interrupt interval.
The charge of discharge of your integrating capacitor throughout the measurement phase is set through the current into the node, one.8 volts/7.five k =240 microamps, divided through the .047 uf capacitance, which offers a 5100 volt/second voltage ramp. The A/D conversion sensitivity is hence 1.25 us/count X 5100 volts/second = six.375 millivolts per count. Right after the count is completed, which occurs once the pseudo 7 bit counter overflows or even the ramp reaches the 1.8 volt reference, U3C is switched off and U3D is switched on to clamp the on the integrator to the one.8 volt reference and to make sure the capacitor is discharged to a consistent state for 1 millisecond just before beginning signal measurement again,The entire measurement cycle requires 999 milliseconds for integration + one millisecond to clamp the capacitor to zero, to get a total of 1 second per measurement. The gian with the integrator is ( ( Peak input Voltage/ a hundred k Ohm) X 0.999 seconds ) )/ .047 microfarads = 212.five volts out/volt in. The sensitivity on the detector is consequently six.375 mv/212.five = 30 microvolts peak per count, or given that peak-to-peak = 2 x peak, sixty microvolts peak-to-peak per count. Following the measurement is completed, the measured value is formatted into BCD and sent via the UART at 9600 baud, two quit bits, no parity. The transmission with the information doesn’t happen during interrupt time. An LED is turned on by the microcontroller in the course of the integration and measurement cycle following a measurement through which the measured worth exceeded 64 decimal.
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